As described in, for example, the Patent Document 1, in a semiconductor device in which a semiconductor chip is mounted on a base material formed of a tape, which is a so-called COT (Chip On Tape) package, a conductive member (a wire in the above-described Patent Document 1) is connected to a surface of a terminal formed on a back surface of the base material (which is a surface exposed from a through hole of the base material) via the through hole formed in the base material, and besides, a semiconductor chip and the conductive member are sealed with a resin (sealing body).
However, adhesiveness between the surface of the terminal and the resin is low. Therefore, if large load (stress, damage) is applied to a joint portion (bonding region) of the conductive member on the surface of the terminal, an electrical property is changed at the joint portion (disconnection occurs in some cases).
The above and other preferred aims and novel characteristics of the present invention will be apparent from the description of the present specification and the accompanying drawings.